1. Field
Example embodiments relate to storage systems (e.g., memory systems using flash memory devices).
2. Description of Conventional Art
Electrically erasable programmable read only memory (EEPROM) is a type of memory device that allows memory blocks to be erased and programmed repetitively and simultaneously. One example EEPROM is flash memory. A conventional flash memory permits a region of memory blocks to be simultaneously programmed and/or erased through a single operation. However, the memory blocks in a conventional flash memory device may deteriorate (wear out) rendering them inoperable. For example, each memory block in a conventional flash device has a charge storage element. This charge storage element is surrounded by an insulation layer. Repetitive use of a memory block may wear out the insulation layer and render the memory block inoperable.
Conventional flash memory devices may store information on one or more silicon chip(s). The stored information may remain on the silicon chip regardless of power consumption and irrespective of a power supply. Additionally, the flash memory device may provide physical impact resistance and faster read access time. Due to these characteristics, a conventional flash memory device may be used as a storage device powered by an outside (external) source (e.g., battery powered). A flash memory device may be classified as a NOR flash memory device or a NAND flash memory device according to logic gate types used in the storage devices.
A conventional flash memory device may store information in an array of transistors (referred to as cells), each of which stores 1-bit of information. Multi-level cell devices store more than 1-bit per cell by varying the charge applied to the floating gate of the cell.
A concern in the use of conventional flash memory is the durability and reliability of memory blocks. Reliability may be determined by the ability of memory blocks to retain data. Durability may be determined by the number of programming/erasing cycles a memory block may bear without quality deterioration. A memory block that is no longer reliable and/or durable is known as a “bad block.”
Bad blocks may occur for a variety of reasons. For example, stored charges (electrons) may leak from a floating gate due to various failures (e.g., thermo-ionic emission and charge diffusion through a defect inter-poly insulation layer; ion impurities; program disturb stress; etc.). This may cause a decrease in a threshold voltage. Furthermore, the opposite effect, charge acquisition, may occur if a floating gate obtains charges relatively slowly while maintaining a control gate at a power supply voltage. This causes an increase in a threshold voltage. In addition, repetitive programming/erasing cycles may cause stresses on an oxide layer of a memory transistor. This may lead to failures such as the breakdown of a tunnel oxide layer in the flash memory device.
In a conventional flash memory device, the possibility of a bad block is further enhanced by aging and deterioration phenomena when the number of the programming/erasing cycles reaches about 10K.
To address such concerns, some conventional wear-leveling methods use entire memory blocks of the flash memory device more uniformly. For example, a conventional form of wear-leveling maps the memory blocks and uses each block in a linear fashion. In this manner, a memory block is not reused until all other memory blocks have been previously used. However, this may cause deterioration in system performance since some memory blocks may be more prone to errors than others over a period of erasing and programming cycles.